Other Parts Discussed in Thread: PCM1864,
Hello I want to record 8 channels from TIDA-01454 CMB into a Beaglebone AI. As the CMB is built with two PCM1864 and it is also a Beagle board, I followed this guide with some changes in oder to make it compatible with Beaglebone AI. I have managed to record audio from 4 of the 8 microphones that the CMB has(I just tap the mic to check if that one is working). The working microphones are MIC1, MIC4, MIC5 and MIC8, although I would say there is much noise.
The CMB has 4 data output pins, so I suppose each one transmits 2 channels and therefore this is my dts file:
&mcasp1 { #sound-dai-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&mcasp1_pins>; status = "okay"; op-mode = <0>; /* MCASP_IIS_MODE */ tdm-slots = <2>; num-serializer = <4>; serial-dir = < /* 1 TX 2 RX 0 unused */ 2 2 0 0 0 0 0 0 0 0 2 2 >; rx-num-evt = <4>; tx-num-evt = <4>; };
The serial-dir is that way because I use mcasp1_axr0, mcasp1_axr1, mcasp1_10 and mcasp1_axr11 because those are the one available in Beaglbone AI. This is my configuration for the CMB:
uint8_t U1_PCM1864_CONFIG[][2] = { {0x00, 0x00}, // Change to Page 0 {0x01, 0x40}, // PGA CH1_L to 32dB {0x02, 0x40}, // PGA CH1_R to 32dB {0x03, 0x40}, // PGA CH2_L to 32dB {0x04, 0x40}, // PGA CH2_R to 32dB {0x05, 0x86}, // Enable SMOOTH PGA Change; Independent Link PGA; {0x06, 0x41}, // Polarity: Normal, Channel: VINL1[SE] {0x07, 0x41}, // Polarity: Normal, Channel: VINR1[SE] {0x08, 0x44}, // Polarity: Normal, Channel: VINL3[SE] {0x09, 0x44}, // Polarity: Normal, Channel: VINR3[SE] {0x0A, 0x00}, // Secondary ADC Input: No Selection {0x0B, 0x44}, // RX WLEN: 24bit; TX WLEN: 24 bit; FMT: I2S format {0x10, 0x03}, // GPIO0_FUNC - SCK Out; GPIO0_POL - Normal {0x11, 0x50}, // GPIO3_FUNC - DOUT2; GPIO3_POL - Normal {0x12, 0x04}, // GPIO0_DIR - GPIO0 - Output {0x13, 0x40}, // GPIO3_DIR � GPIO3 - Output {0x20, 0x11} // MST_MODE: Master; CLKDET_EN: Disable }; uint8_t U2_PCM1864_CONFIG[][2] = { {0x00, 0x00}, // Change to Page 0 {0x01, 0x40}, // PGA CH1_L to 32dB {0x02, 0x40}, // PGA CH1_R to 32dB {0x03, 0x40}, // PGA CH2_L to 32dB {0x04, 0x40}, // PGA CH2_R to 32dB {0x05, 0x86}, // Enable SMOOTH PGA Change; Independent Link PGA; {0x06, 0x41}, // Polarity: Normal, Channel: VINL1[SE] {0x07, 0x41}, // Polarity: Normal, Channel: VINR1[SE] {0x08, 0x44}, // Polarity: Normal, Channel: VINL3[SE] {0x09, 0x44}, // Polarity: Normal, Channel: VINR3[SE] {0x0A, 0x00}, // Secondary ADC Input: No Selection {0x0B, 0x44}, // RX WLEN: 24bit; TX WLEN: 24 bit; FMT: I2S format {0x10, 0x00}, // GPIO0_FUNC – GPIO0; GPIO0_POL - Normal {0x11, 0x50}, // GPIO3_FUNC - DOUT2; GPIO3_POL - Normal {0x12, 0x00}, // GPIO0_DIR - GPIO0 - Input {0x13, 0x40}, // GPIO3_DIR � GPIO3 - Output {0x20, 0x01} // MST_MODE: Slave; CLKDET_EN: Enable };
So what am I missing to get the 8 channels?